![]() ![]() It talks about SCL, but will work the same for SDA Have a look at this app note I wrote, that shows you how to see which chip (master or slave) is pulling the pin down. If it is a bit bash master, then you should be sampling SDA just before you make SCL fall (which your aren't doing), and definitely a couple of us after the rising edge. If this is a HW master, maybe it isn't set for I2C i.e. I suspect your slave is not acking (address is wrong) as SDA stays high, and your library is aborting and forcing SDA low perhaps. The master should be outputting the 9th clock falling edge and sampling SDA just before/at the falling edge. It should have settled low within a couple of us of SCL falling, and before SCL rises. The SDA should not be falling at the same time as SCL rises. You are only showing 8 clock pulses for data, and is not showing the 9th ACK clock pulse falling edge. ![]() So it seems this may be more of an issue with the slave device than an I2C issue, right? Micro-SDA is high (correct) but slave-SDA is pulled low still. After the operation, I disconnect SDA and measure it on the microcontroller side and slave side. I bit banged the I2C operation in question and added the 9th clock cycle. The current trace is at 100 KHz but I've tried at 10KHz and it does the same thing. I'm thinking the slave is just a bit too slow with the ACK. My I2C library is a reliable one from manufacturer that I've used many times successfully with different devices. Further more, the slave keeps SDA low since their isn't a 9th clock pulse, and my I2C peripheral gets stuck trying to finish the stop condition. But my I2C library always reports it a NACK. ![]() ![]() The slave drives SDA low at the end to ACK the transaction. My I2C transactions always get NACK'd, but I believe the slave is ACK'ing the transaction, just a little bit too late and my microcontroller thinks it's a NACK. ISBN 978-1-84520-697-0.I am programming a microcontroller to talk with a slave device via I2C.
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